Similar work: klog#36572 (IX1), klog#36625 (IY1), klog#36654 (EX0), klog#36692 (EY0)
Preparation for this work: klog#36874
IO chassis for K1EX1 was replaced from V1 (S1301976) to V2 (S2416117) chassis.
All PCIe boards were just moved from V1 to V2 chassis with keeping their card numbers on the real time models.
There was no PCIe problem on this work.
Because IRIG-B issue was occurred, IRIG-B card was also replaced as one without any issue on the test bench.
After replacement work, I confirmed VIS_ETMX can reach ALIGNED and MISALIGNED states.
ADC/DAC noise measurement will be done in the next week.
We measured ADC and DAC noise of K1EX1 with the V2 IO chassis.
There is no large difference in glitchy channels in the previous measurements measurement with the V1 IO chassis klog#20902.
We cannot assess an impact of these minor differences on lock acquisition now (the required values for PRFPMI and RSE may differ).
It appears that there are no issues at least in terms of maintaining the LOCK_ACQUISITION state for VIS.
Noise on each channels are shown in attached figures.
Original measurement data can be found in /users/DGS/measurements/{ADC,DAC}/K1EX1/2026/0524/*.xml
