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DGS (General)
takahiro.yamamoto - 18:10 Wednesday 18 August 2021 (17944) Print this report
Comment to EY0 rack maintenance (17911)
[Ushiba, YamaT]

We fixed bug in k1vistmsy and k1tmsy and new models are now running.

When Ushiba-kun unplugged the cable for TMS DCPDs which is connected to ADC1, there is no response on PD channels.
At first, we doubted the channel shuffle issue, but ADC1 surely responded on the IOP model.
And also I noticed channel values of ADC1 on the IOP model is same as ones of ADC2 on TMS models.
On the other hand, PD channels were also connected to ADC1.

Finally, I found that following things by checking generated C-code and fixed this problem by adding a ADC0 block on TMS models.
- Even if ADC0 is not used explicitly, the ADC0 block is necessary for each model.
- The correspondence between the ADC array (dWord[ii][jj]) and each channel is correct, but the pointer address seems to be wrong.
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