As the initial preparation of the IO chassis replacement, we laid the MTP-LC breakout cable from EY1 rack at the front-room of the 2nd floor to EYV1 rack.
The new cable is housed in the existing corrugated tube and will be used when IO chassis of K1EY1 will be replaced as V2 one.
V2 IO chassis for K1EY1 was also transported to the EYV room.
We will replace the IO chassis for K1EY1 next week.
We measured ADC and DAC noise of K1EY1 with the V2 IO chassis.
In many channels, undesirable glitches and/or noise structure were reduced from previous measurement with V1 IO chassis (see klog#20682).
On the other hand, ADC glitches appears some few channels.
We cannot assess an impact of these differences on lock acquisition now (the required values for PRFPMI and RSE may differ).
It appears that there are no issues at least in terms of maintaining the LOCK_ACQUISITION state for VIS.
Noise on each channels are shown in attached figures.
Original measurement data can be found in /users/DGS/measurements/{ADC,DAC}/K1EY1/2026/0615/*.xml
