Komori, Tanaka

## What we did

• We measured the TF from the TM actuator to TM oplev by injecting a white noise from CHARD_{P,Y}_SM_EXC. At that time, in order not to excite the MN stage, we turned off MN_LOCK_OUTSW_{P,Y} in advance.
• This time, we adjusted the OUTMTRX element value for ITMX, ITMY, and ETMY, respectively from the ratios between ETMX and the others at 0.1 Hz in the P case or at 1 Hz in the Y case which frequencies are near each UGF so that each DC gain get the same.
• Then, we measued the TF from the MN actuator to TM oplev with current LOCK filters by injecting a white noise from CHARD_{P,Y}_SM_EXC. At that time, in order not to excite the TM stage, we turned off TM_LOCK_OUTSW_{P,Y} in advance.
• We adjusted the overall gain of MN_LOCK filters to make the crossover frequency 0.1 Hz. Fig. 1 (PIT) and Fig.2 (YAW) show the results. The cross over seems to be 0.1 Hz, the DC gain seems to be almost the same. We use these actuators to try to lock ASC.

## Note

I made a mistake to apply too large excitation (~6000 cnts) to the MN stage in performing the above TF measurement. And then, ITMX and ITMY got tripped because the NBDAMP_Y4 with TM oplev signal kicked BF YAW due to TM oplev got out of range by exciting MN largly and reached the BF RMS to the WD threshold.

After this RMS calmed down, I requested the LOCK_ACQUISITION to ITMX and ITMY guardians but they stopped in the CALM_DOWN state maybe because the IP control seems to be saturated. At once, we set ITMY and ITMX to SAFE state

ACCBLEND_FLDACC{L.T,Y}_OUT and IP_FLDACCINF_H{1,2,3}_OUT seems to be stored much larger value than usual due to this trip. I and Yokozawa-san tried to clear their integrator history and then we could restore ITMX and ITMY to LOCK_ACQUISITION.

On the other hand, according to Ushiba-san, there are a high pass filter in the IP_BLEND_ACC{L,T,Y} filter after ACCBLEND_FLDACC{L.T,Y}_OUT so the large DC value in those OUT should be cause of the saturation of IP controls. However, the cutoff frequency (80mHz) of high pass filters seems to be faster that the one (0.1 mHz) of the integrater so the DC value seems to remain in IP_BLEND_ACC{L,T,Y}_IN1. So if the guardian go to LOCK_ACQUISITION even though the DC value in IP_BLEND_ACC{L,T,Y}_IN1 still large, the saturation of IP controls will occur. So we ask Yamamoto-san to implement the waiting state to calm down the input value and Yamamoto-san implemented it as reported in klog32491.