[Kamiizumi, Tomura, YamaT]

This is report of Friday's work

Abstract
This work is related to klog#23195.
We checked ADC noise level on SR2 (Fig.1~Fig.4), SR3 (Fig.5~Fig.8), SRM (Fig.9~Fig.12), OMC0 (Fig.13~Fig.28), and OMC1 (Fig.29~Fig.32) was measured.
15-17Hz peak which moves in time (?) exists on OMC DCPD channels.
So it's better to check IFO signal is enough larger than this peak.

Details
For checking the existence of ADC glitches, we measured spectra with unplugging DB9 cable at the input of AA chassis.
Following channels has noise excess from nominal ADC noise level related to ADC glitches.
- SR2 ADC0 CH15 (unused)
- SR3 ADC0 CH09 (unused)
- SR3 ADC0 CH10 (unused)
- SRM ADC0 CH20 (IP_ACCINF_H1)
- OMC0 ADC0 CH11 (QPDV2_SEG4)
- OMC0 ADC1 CH03 (OMMT1_TM_OPLEV_SEG4)
- OMC0 ADC1 CH07 (OMMT2_TM_OPLEV_SEG4)
- OMC0 ADC1 CH23 (AS_QPDA1_RF17_I4)
- OMC0 ADC1 CH27 (AS_QPDA2_RF17_I2)
- OMC0 ADC2 CH17 (unused)
- OMC0 ADC2 CH24 (NAB-IXA_BAFFLEPD_A)
- OMC0 ADC2 CH31 (NAB_IYA_BAFFLEPD_D)
- OMC1 ADC0 CH22 (unused)
(Most of glitchy channels are assigned to 4-9 pins of DB9?)

Channel assign of SR3 is different from other TypeB suspensions.
(See also JGW-L2011565).
Maybe this assignment is to avoid glitchy channels (ADC0 CH8-11) shown in Fig.6.
CH9 is the loudest channel which I have ever seen.


In addition to ADC glitches, some peaks can be seen.
- 2350Hz on almost all channels of SR2
- 127Hz series on many channels of SR3 and SRM (SR3 and SRM share the power supply)
- 15-17Hz peak (which maybe moves in time) on OMC including channels for DCPD.
They can be also removed by unplugging SCSI cable between ADC and AA as shown in Fig.33, and Fig.34.
(Reference and measured spectra shows ADC noise with and without SCSI cable, respectively.)
But when SCSI cable is unplugged, timing (960Hz, 961Hz and a their beat) signals appears other channels.
It may be better to check electrical connection one by one.