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VIS (IX)
takahiro.yamamoto - 23:20 Saturday 04 September 2021 (18154) Print this report
glitches during isolation
Abstract
In these days, gliches such as Fig.1 appear on IP_IDAMP signals during the isolating.
They seem to appear when "DC" filters turning ON (finish ramp time).
We may identify the cause of these glitches by re-engaging with changing ramp time of "DC" filters.
(Now we don't want to change ITMX state in order to evaluate the stability of GAS loop. So I'll try later.)

Details
Because we knew these glitches appeared in ENGAGE_BF state, I doubted at first BF control signals affect IP motion.
But by seeing time line of engaging control of each stage, glitches appeared before BF signals were output from DAC.
So BF control is not a cause of IP glitches.

The transitions for each signal are shown in Fig.2.
97, 96, and 98 on K1:GRD-VIS_ITMX_STATE_N means ENGAGE_GAS, ENGAGE_IP, and ENGAGE_BF states, respectively.

Chage in .*_SWSTAT indicates filter bank swiches are turn ON (or OFF)
In IP_IDAMP_{L, T}, gliches appears 60 seconds after turning ON filter bank swiches.
Fig.3 and Fig.4 are the enlarged view of Fig.2 for IDAMP_L and T, respectively.

And also, I noticed gliches appeared on the BF_DAMP_Y signal.
In the BF case, duration between turning ON filter switches and appearing a glitch is 20 seconds. See also Fig.5.
These situation is reproduced in another engaging trials such as around GPS=1314707109, and 1314787281, and so on.

"60 seconds" and "20 seconds" are same as the ramp time of "DC" filter.
This fact may be an accidental coincidence.
But it's better to check once changing ramp time settings.
Images attached to this report
Comments to this report:
takahiro.yamamoto - 9:26 Monday 06 September 2021 (18158) Print this report
I tested ramp filter effect for DC filter by using unused filter bank.
DC jump to occurred when the filter ramp was finished.

-----
I copied DC and DAMP filter to unsed filter bank block
and checked behavior of ramp time to colored Gaussian noise injected from awggui.
Setup of this test is shown in FIg.1.

Fig.2 and Fig.3 shows the timing delay between turning ON filter and occuring glitch
with 60 seconds and 40 seconds as filter ramp time, respectively.

We should check the implementation of filter process in RCG code.
Anyway, glitch occurring time seems to depends on ramp time.
Images attached to this comment
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