This is the updated table after a change in the F0 channel of the LVDT driver board. See entry 7427.
| LVDT | Input gain | Output gain resistance (Ohm) | Phase (µs) | Board and probe point |
| BF | 0.975 | 57.1 | 21, signal at probe point ahead. | left board, P0 |
| SF | 0.977 | 57.5 | 20, signal at probe point ahead. | left, P1 |
| F0 | 0.975 | 64.4 | 16, signal at probe point ahead. | left, P2 |
| IP #1 | 0.975 | 31.75 | zero | right, P0 |
| IP #2 | 0.975 | 31.2 | zero | right, P1 |
| IP #3 | 0.971 | 31.8 | zero | right, P2 |