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VIS (SRM)
fabian.arellano - 21:56 Tuesday 18 December 2018 (7427) Print this report
F0 LVDT new calibration

With Hiarata-san and Mark,

We repeteated the calibration of the F0 LVDT (see entry 7182). The reason were the following:

  1. The linear range was too short. Namely, 4 mm in total. We realized this was, at least to some extent, the consequence of setting the phase between the reference signal and the LVDT signal to zero at the LVDT driver board.
  2. I moved the LVDT coil attached to the yoke after setting the configuration of the channel at the driver board.

After modifying the board settings we got ~31,005 counts at a keystone position of ~5 mm and ~-26,034 counts at 18.4 mm. These positons are the physical limits of the keystone displacement. The reference is shown in the picture included in the Excel file attached this this report. The configuration of the LVDT driver channel is as follows:

  1. Output gain resistance: 64.4 Ω (used to be 32.86 Ω).
  2. Input gain: 0.975 (I didn't change this value).
  3. Phase: not measured yet.

See old values in entry 7215.

The calibration results are the following:

  1. Nominal position: 11.5 mm. This value was set according to our experience with other suspensions (entries 7078 and 5734) but we still have to check that the height of the RM with respect to the security structure below is 30 mm (per 3D CAD).
  2. Calibration factor: 0.1855 µm/count.
  3. Offset to set in the medm screen: +2551 counts. If we decide to change the nomial position this value will change.
  4. Linear range: 8 mm total, [ -2.5 , 5.5 ] mm from the nominal position.
  5. The slope of the line shown in the plot is negative because the position reference is above the keystone and the gap increases as the keystone goes down (see picture in the spreadsheet). Nevertheless, the calibration factor is written as positive in the medm screen.
  6. The medm screen as been modified already.

We also fond (before calibration) that the flipper adapter at the flange was faulty. We put a new one.

Non-image files attached to this report
Comments to this report:
fabian.arellano - 14:47 Wednesday 19 December 2018 (7435) Print this report

Today I measured the phase that had been set yesterday in the F0 channel of the LVDT driver board.

  1. It's value is 16 µs of a period of 100 µs, with the signal at probe point P2 ahead of the reference signal.
  2. See these pictures: picture 1, picture 2 and picture 3.

The table at entry 7215 will be updated.

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